Last update: August 2026
Quantum algorithms are typically described using abstract qubits and quantum gates. Real quantum processors impose concrete constraints: qubits have limited connectivity, only specific operations are available natively, operations differ in duration and fidelity, and moving quantum information can be expensive.
In my group, we develop quantum compilation methods that transform quantum programs into efficient, hardware-compatible executions while preserving their intended computation. Our work focuses on mapping, routing, hardware-specific decomposition, and compilation for scalable and modular architectures. We study how decisions across different compiler stages interact and how they are influenced by the underlying hardware.
Executing a quantum circuit requires several interconnected transformations.
Logical qubits must be assigned to physical qubits, operations have to respect processor connectivity, and quantum information may need to be moved when interacting qubits are not directly connected. Gates can require decomposition into hardware-native operations, while scheduling determines when these operations can be executed.
These decisions influence each other. A good initial qubit placement can reduce routing overhead. Routing decisions affect subsequent operations. Hardware-native gate sets determine which decompositions are efficient.
We study these compiler stages jointly and develop methods that take the properties of the target architecture into account throughout the compilation process.
Qubit mapping and routing are central challenges in quantum compilation.
Limited connectivity already requires additional operations on current devices. In larger and modular quantum computers, communication can also occur between cores or modules, where movement and interaction may have substantially different costs and constraints.
Our work develops mapping and routing algorithms for these architectures, including dedicated methods for spin-qubit processors and multi-core quantum systems. We also study the structure of the mapping problem itself: how circuit dependencies restrict possible mappings, how workloads determine communication requirements, and which architectural properties have the strongest influence on compilation overhead.
The relevant objective depends on the architecture and workload. Circuit depth, routing operations, communication volume, execution time, and fidelity can all become important. We investigate these trade-offs and how they evolve as quantum systems scale.
Different quantum technologies provide different computational primitives and physical constraints. A compiler therefore needs information beyond an abstract connectivity graph.
We develop hardware-aware compilation methods for specific quantum platforms, including semiconductor spin qubits and diamond NV-center systems. Their physical characteristics influence decomposition, mapping, routing, and scheduling, and can require dedicated optimization strategies.
We also develop software frameworks for implementing and benchmarking different compilation strategies. Using common workloads, hardware models, and evaluation metrics allows us to compare approaches systematically and identify which strategies work well for a particular architecture or workload.
The objective is a flexible software stack that can adapt to emerging quantum architectures while retaining the hardware information needed for efficient execution.
Compilation forms the interface between quantum algorithms and quantum hardware, and it also provides information about the quality of architectural choices.
Routing overhead can reveal insufficient connectivity. Communication patterns provide requirements for modular architectures. Hardware-specific decompositions show how physical gate sets affect higher layers of the software stack. Applications, in turn, determine which compilation objectives matter for useful execution.
We therefore use compilation both to map programs to machines and to analyze how quantum computers should be designed. This connection between architecture, compilation, reliability, and applications is a central part of our full-stack approach to quantum computing.
Compiler design for hardware specific decomposition optimizations, tailored to diamond NV centers. IEEE International Conference on Quantum Computing and Engineering (QCE), 2025.
Revisiting the mapping of quantum circuits: Entering the multi-core era. ACM Transactions on Quantum Computing, 2025.
Lightcone bounds for quantum circuit mapping via uncomplexity. npj Quantum Information, 2024.
BeSnake: A Routing Algorithm for Scalable Spin-Qubit Architectures. IEEE Transactions on Quantum Engineering, 2024.
SpinQ: Compilation strategies for scalable spin-qubit architectures. ACM Transactions on Quantum Computing, 2023.
qgym: A Gym for training and benchmarking RL-based quantum compilation. IEEE International Conference on Quantum Computing and Engineering (QCE), 2023.
qgym: Framework for developing, training, and benchmarking quantum compilation methods, including initial mapping, routing, and scheduling.
[GitHub] [PyPI] [Publication]
KetGPT: Tools and data for generating representative quantum circuits that can be used for benchmarking quantum compilers and systems.
[GitHub] [Dataset] [Publication]